Power Integrity Engineer

ABOUT LUMILENS

At Lumilens we are building the critical photonics infrastructure that powers tomorrow’s AI supercomputing. From chip-to-chip optical interconnects to scalable photonic engines, Lumilens is unlocking a new era of computing faster, cooler, and massively more efficient.

We’re a well-funded startup backed by Mayfield and led by veterans who’ve builtAnd scaled some of the most transformative technologies in the industry. This isn’t incremental innovation, it’s a ground-floor opportunity to rethink the optical layer from the silicon up. You’ll work alongside a team of world-class engineers solving some of the hardest challenges in optics, systems, and scale. Every line of code, every design decision, every breakthrough you help deliver will shape the infrastructure of tomorrow.

If you're looking for mission, momentum, and the chance to make an outsized impact jump on the rocket ship. We’re just getting started.

Role Overview

We are seeking a skilled Power Integrity (PI) Engineer to optimize power distribution networks for OSFP transceiver designs. You will collaborate with cross-functional teams to ensure robust, low-noise power delivery for high-speed silicon photonics, DSPs, and retimers, minimizing PDN impedance and electromagnetic interference in dense 800G+ modules.

Key Responsibilities:

• ⁠Perform PI simulations using tools like Ansys SIwave, Keysight ADS, or Cadence Sigrity to model and optimize PDN for OSFP modules, targeting <1mΩ target impedance across 10kHz-100MHz bandwidth.

• Analyze and mitigate power rail decoupling, VRMs, and bypass capacitor placement for multi-rail supplies (0.8V core, 1.8V I/O, 3.3V aux) in high-current OSFP designs up to 100W+.

• ⁠Collaborate on PCB stackups, via optimization, and plane splitting to reduce simultaneous switching noise (SSN) and ground bounce in 112G PAM4 SerDes environments.

• Validate designs through lab measurements using VNA, oscilloscopes, and power analyzers; correlate simulations with hardware prototypes.

• ⁠Support signal integrity co-optimization, thermal-PD synergy (e.g., integrating TIMs with PDN), and compliance to IEEE 802.3ck/802.3df standards.

• Document PI reports, contribute to design reviews, and mentor junior engineers on best practices for hyperscale OSFP deployments.

• ⁠Bachelor’s or Master’s in Electrical/Electronics Engineering, with focus on RF/mixed-signal design.

Required Qualifications:

• ⁠Bachelor’s or Master’s in Electrical/Electronics Engineering, with focus on RF/mixed-signal design.

• 5+ years in PI for high-speed transceivers (OSFP, QSFP-DD, or CDFP preferred); hands-on with 50G+ SerDes.

• ⁠Proficiency in PI tools (Ansys, HyperLynx, Sigrity) and scripting (Python/MATLAB) for automation.

• ⁠Strong understanding of power converter topologies (Buck/Buck-Boost), ESL modeling, and EMI/EMC mitigation.

• ⁠Experience with OSFP mechanical constraints, flex-rigid PCBs, and multi-die integration (e.g., co-packaged optics).

• Preferred Skills

• Familiarity with thermal co-simulation (e.g., Ansys Icepak integration) for heat-affected PDN performance.

• Knowledge of advanced materials like low-Dk dielectrics or embedded passives for PDN miniaturization.

• Prior work on 1.6T OSFP or CPO (Co-Packaged Optics) prototypes.

What we offer

• Competitive salary commensurate with experience

• Comprehensive benefits package including health insurance

• Professional development opportunities and certification support

• Access to cutting-edge technology and cloud platforms

• Collaborative work environment with cross-functional teams

*Lumilens is an equal opportunity employer. All qualified applicants will receive consideration without regard to race, color, religion, gender, identity, orientation, veteran status, disability, or any other legally protected status.

This Power Integrity Engineer role focuses on optimizing and validating power delivery networks for high-speed OSFP optical transceiver modules. The work combines simulation, hardware measurement, and cross-functional design collaboration for dense modules used in AI computing infrastructure.

Role at a glance

Skills mentioned

What you will likely work on

• Simulate and tune OSFP power distribution networks to meet impedance targets across the stated frequency range.
• Assess decoupling, voltage regulators, and capacitor placement across multi-rail, high-current designs.
• Work with PCB stackups, vias, and plane arrangements to reduce switching noise and ground bounce.
• Measure prototypes with lab instruments and compare results with simulation models.
• Coordinate power integrity with signal integrity, thermal considerations, and relevant IEEE compliance needs.
• Prepare PI reports, participate in design reviews, and mentor junior engineers on design practices.

Good fit signals

• At least five years of power integrity experience for high-speed transceivers and hands-on experience with 50G+ SerDes are requested.
• A background in Electrical or Electronics Engineering focused on RF or mixed-signal design is required.
• The role calls for practical use of PI tools and scripting with Python or MATLAB for automation.
• Experience with OSFP mechanical constraints, flex-rigid PCBs, and multi-die integration is relevant.
• Thermal co-simulation, advanced PDN materials, and 1.6T OSFP or CPO prototypes are preferred rather than required.